1. Field of the Invention
The present invention relates to an interface circuit.
2. Description of the Related Art
In a semiconductor device, the interface circuit is used for a circuit for transmitting between a plurality of circuit blocks which have different operating voltages. Particularly, an interface circuit used for an input buffer changes a signal level of an input signal supplied from the outside so as to convert from a voltage level of an external power supply to a voltage level of an internal power supply and supply the convert signal to an internal circuit. Such an interface circuit comprises a plurality of inverter circuits connected to each other in series, for example. In the interface circuit, a first stage inverter circuit inverts the input signal on the basis of the external power supply voltage supplied from the external power supply and the following stage inverter circuits perform the conversion and inversion of the signal level on the basis of the internal power supply.
The internal power supply voltage is generated by descending the voltage level of the external power supply voltage with a voltage convert circuit or the like, for example. Therefore, the voltage level of the voltage level of the internal power supply voltage is lower than the voltage level of the external power supply voltage generally. However, just after the external power supply is dropped or when power failure occurs and so on, there can be situation that the external power supply voltage level becomes less than the internal power supply voltage level, because a time difference (time lag) is produced between these voltage level declines of the external and internal power supply voltages. Particularly, in the foregoing voltage convert circuit, a bypass capacitor may be provided between the voltage convert circuit and the internal circuit in parallel in order to prevent transient potential fluctuation of the external power supply voltage from propagating. Even in such a configuration, the change of the internal power supply voltage does not come up the change of the external power supply voltage. Therefore the potential of the external power supply voltage is apt to become transitionally less than the potential of the internal power supply voltage.
Furthermore, the voltage levels of the external power supply voltage and the internal power supply voltage have fluctuation even by influence of noise or the like. There is developed a semiconductor device having a circuit breaker breaking between the interface circuit and the internal circuit in order to avoid the voltage level fluctuation of the supply voltage affecting the interface circuit operation (for example, Japanese Patent Application Laid-Open No. H4-47597, referring to as “patent document 1” hereinafter). Furthermore, there is also developed an interblock interface circuit for performing a signal exchange between a plurality of circuit blocks, which includes a storage unit maintaining an output signal from one of circuit blocks, and an interblock signal control circuit which, when breaking the power supply to the circuit blocks, breaks signal transition between the circuit blocks storage and the storage unit and then continues to output the stored signal (for example, Japanese Patent Application Laid-Open No. 2003-92359, referring to as “patent document 2” hereinafter).
The situation occurs in that the external power supply voltage level becomes less than the internal power supply voltage level, just after the external power supply is dropped or when power failure occurs and so on. After that such voltage level may further decreases less than a logic threshold value of an inverter circuit included in the interface circuit. In such a case, the inverter circuit may make a misjudgment such that, in fact, the signal level of the input signal is a high level, but the circuit decides that it is a low level. Thus, there is a possibility that the malfunction of the interface circuit
It can be considered that a circuit such as the circuit breaker or the interblock signal control circuit shown in the foregoing patent documents 1 and 2 is added to the interface circuit in order to prevent the malfunction affecting the internal circuit. However, these circuits have a large circuit scale and large electric power consumption as a problem.